Others have mentioned tighter tolerance in the cable and PCB parameters.
Each successive frequency increase has required more complex PHY design.
On the digital side : more sophisticated bit encoding schemes
On the analog side : tighter tolerances for clocking and signal jitter, more sophisticated transmitter and receiver technology (better emphasis/deemphasis, better equalization)
Each successive frequency increase has required more complex PHY design.
On the digital side : more sophisticated bit encoding schemes
On the analog side : tighter tolerances for clocking and signal jitter, more sophisticated transmitter and receiver technology (better emphasis/deemphasis, better equalization)
Here's taste of the PHY changes : https://www.chipestimate.com/Type-C-USB31-PHY-Challenges-in-...