It's not about the chips. They aren't in the business of selling chips, for better or worse. They are in the business of selling access to Windows drivers that work.
First, you need to talk about whole cost of production and quality of the product. When you reduce your node your development and production costs grow exponentially. Size of the wafer is only small part of the production cost.
Second, the chip area can't be arbitrarily small. You still need area to connect it with outside, area for larger components, etc. When you reduce your transistor size at some point the chip area will stop getting reduced because of packaging requirements.
> First, you need to talk about whole cost of production and quality of the product. When you reduce your node your development and production costs grow exponentially. Size of the wafer is only small part of the production cost.
What exponent?
The number of mask steps is similar or a few more from 600nm to 180nm. Isn't that the best way to estimate cost per wafer, in combination with the cost to make the masks?
> Second, the chip area can't be arbitrarily small. You still need area to connect it with outside, area for larger components, etc. When you reduce your transistor size at some point the chip area will stop getting reduced because of packaging requirements.
That's why I said 5x instead of 20x. I looked at the size of the pads and the circuitry around them, assumed they wouldn't shrink at all, then combined that with a somewhat pessimistic estimate of how much the logic could shrink.
