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I like the end of the article.

>If Pentium could run at 3 GHz and the FSB got a proportional clock speed increase, core to core latency would be just over 20 ns.

Ran the test against my closest equivalent.

CPU: Intel(R) Celeron(R) G5905T CPU @ 3.30GHz Num cores: 2 Num iterations per samples: 5000 Num samples: 300

1) CAS latency on a single shared cache line

           0       1   
      0
      1   25±0 

    Min  latency: 25.3ns ±0.2 cores: (1,0)
    Max  latency: 25.3ns ±0.2 cores: (1,0)
    Mean latency: 25.3ns
Just wish I had a dual socket Pentium for the last 40 years.


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