Is it really 30% of your silicon even discounting caches? I'd love to see some analysis (and comparison against arm) of this from an expert; I've heard everything varying from "x86 instruction decoding is majority of the power drain" to "ISA doesn't matter, it's everything behind the frontend that matters" and it's hard to find actual analysis. I guess partly because this is all highly confidential.

And I know even ARM has instructions that make chip designers want to get all stabbity (ldm, stm)